Unit 4: Counters
Digital Circuits & Logic Design notes · PTU syllabus (BSIT204/BSBC303)
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Unit summary
Counters count clock pulses for timing, sequencing and frequency division. This unit covers clock pulse generation using a 555 timer as monostable and astable multivibrator, design of asynchronous and synchronous counters, up–down counters and MOD-N counters.
After this unit you can
- Generate clock pulses with a 555 timer
- Design asynchronous counters
- Design synchronous and up–down counters
- Design MOD-N counters
PTU syllabus topics
- Clock pulse generation using a 555 timer as monostable and multivibrator
- design of asynchronous and synchronous counters
- up-down counters
- MOD-N counters
Clock
Only the first flip-flop
All flip-flops together
Speed
Slower: delays add up
Faster
Design
Simple
More complex
Glitches
More likely
Fewer
Topic 1
The 555 timer
- 555 timer IC: a versatile timing chip with comparators, an SR flip-flop and a discharge transistor; supply 4.5–15 V.
Stable states
One stable state; triggered pulse
No stable state; free-running
Output
Single pulse of fixed width
Continuous square wave (clock)
Timing formula
T = 1.1 R C
f = 1.44 ÷ [(R1 + 2R2) C]
Use
Timers, debouncing, delays
Clock pulses for counters, LED flashers, tone generators
Example
Astable with R1 = 1 kΩ, R2 = 10 kΩ, C = 10 µF: f = 1.44 ÷ (21,000 × 0.00001) ≈ 6.9 Hz.
- Duty cycle (astable): (R1 + R2) ÷ (R1 + 2R2) × 100.
Topic 2
Asynchronous (ripple) counters
- Flip-flops are clocked one after another — the output of one triggers the next; simple but slower because delays add up (ripple).
- 1Connect three T (or JK with J = K = 1) flip-flops
- 2Clock drives the first flip-flop
- 3Q of each stage clocks the next (negative-edge)
- 4Outputs count 000 to 111 then repeat
- Number of states: 2ⁿ for n flip-flops; frequency at the last stage = clock ÷ 2ⁿ.
Topic 3
Synchronous counters
- All flip-flops receive the same clock; next-state logic decides which toggle — faster and free of ripple delay.
- 1Decide the number of flip-flops and the count sequence
- 2Draw the state table
- 3Use flip-flop excitation tables
- 4Derive input expressions with K-maps
- 5Draw the circuit
- 3-bit synchronous up counter (T flip-flops): T0 = 1, T1 = Q0, T2 = Q0 Q1.
Topic 4
Up–down counters
- Count up or down under a control input M: up when M = 1 (use Q outputs), down when M = 0 (use Q′ outputs) to drive the next stage.
Topic 5
MOD-N counters
- MOD-N counter: counts N states then resets — e.g., MOD-10 (decade or BCD) counter counts 0–9.
- Design by reset: use n flip-flops where 2ⁿ ≥ N; detect state N with a NAND gate and clear all flip-flops.
Example
MOD-6 counter: 3 flip-flops; when the count reaches 110 (6), a NAND gate on Q2 and Q1 clears the counter to 000 — giving states 0 to 5.
- Other counters: ring counter (n states with n flip-flops) and Johnson (twisted-ring) counter (2n states).
Key terms
- Monostable
- Circuit with one stable state producing a single pulse
- Astable
- Free-running oscillator producing a square wave
- Ripple counter
- Counter whose flip-flops are clocked in sequence
- Synchronous counter
- Counter with a common clock to all flip-flops
- MOD-N counter
- Counter with N distinct states
Quick revision
- 555 internal blocks; monostable T = 1.1RC; astable f = 1.44 ÷ [(R1 + 2R2)C].
- Ripple counters: simple, slow; 2ⁿ states.
- Synchronous design using excitation tables and K-maps.
- Up–down counters.
- MOD-N by reset; decade counter; ring and Johnson counters.
Important exam questions
Practice questions written to the PTU exam pattern for this unit's syllabus: short answers (Section A style) and long answers (Sections B and C style).
Short-answer questions
- Q1.Distinguish monostable and astable modes of the 555.
- Q2.State the formula for the frequency of a 555 astable multivibrator.
- Q3.Distinguish asynchronous and synchronous counters.
- Q4.How many flip-flops are needed for a MOD-12 counter?
- Q5.What is a decade counter?
- Q6.Distinguish ring and Johnson counters.
Long-answer questions
- Q1.Explain the 555 timer as a monostable and astable multivibrator.
- Q2.Design a 3-bit asynchronous up counter.
- Q3.Design a 3-bit synchronous up–down counter.
- Q4.Design a MOD-N counter and explain its working.
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