Unit 4: Computer organization
Computer Architecture notes · PTU syllabus (UGCC2502)
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Unit summary
Computer organisation explains how the hardware parts of a computer — CPU, memory and input/output — are arranged and work together to run programs. It connects the gates and flip-flops of earlier units to the working of a real processor.
This unit covers the stored program concept, Von Neumann and Harvard architectures, RISC and CISC, register transfer and micro-operations, instruction formats and the common bus system.
After this unit you can
- Describe the main parts of a computer and the CPU
- Compare Von Neumann and Harvard, and RISC and CISC architectures
- Write simple register transfer statements and identify micro-operations
- Explain instruction formats and the common bus system
PTU syllabus topics
- Introduction to computer and CPU organization
- stored program concept
- Von Neumann and Harvard architectures
- RISC and CISC architecture
- register transfer and micro-operations
- instruction formats (memory reference, register reference, I/O instructions)
- common bus system — data
- control and address buses
- 1Fetch
Read the instruction from memory into the instruction register
- 2Decode
The control unit works out what the instruction means
- 3Execute
The ALU or other unit performs the operation
- 4Store
Write the result to a register or memory
Topic 1
Computer and CPU organisation
A computer has four functional parts: the input unit, the memory unit, the CPU and the output unit. The CPU has three main parts:
- Arithmetic Logic Unit (ALU): performs arithmetic and logical operations.
- Control Unit (CU): fetches and decodes instructions and sends control signals to every part.
- Registers: small, very fast storage inside the CPU, such as the Program Counter (PC), Accumulator (AC), Instruction Register (IR), Memory Address Register (MAR) and Memory Data Register (MDR).
- 1Fetch
PC gives the address; instruction goes to IR
- 2Decode
CU works out the operation
- 3Execute
ALU or memory carries it out
- 4Store and repeat
PC moves to the next instruction
Topic 2
Stored program concept, Von Neumann and Harvard
The stored program concept (John von Neumann, 1945) says that both the program instructions and the data are stored together in main memory, so a computer can be reprogrammed simply by loading a new program.
Memory
One memory for instructions and data
Separate memories for instructions and data
Buses
One shared bus
Separate buses
Speed
Slower: instruction and data fetches take turns (Von Neumann bottleneck)
Faster: both can be fetched at once
Used in
General-purpose PCs
Microcontrollers, DSPs, CPU caches
Topic 3
RISC and CISC
Full form
Reduced Instruction Set Computer
Complex Instruction Set Computer
Instructions
Few, simple, fixed length
Many, complex, variable length
Execution
About one instruction per clock cycle
Several cycles per instruction
Memory access
Only load and store instructions
Many instructions access memory
Registers
Many
Fewer
Examples
ARM (mobiles), RISC-V
Intel x86
Exam tip
In RISC the compiler does more work; in CISC the hardware does more work. Quote this line in comparison answers.
Topic 4
Register transfer and micro-operations
Register Transfer Language (RTL) is a notation for describing data moving between registers. R2 ← R1 means "copy the contents of R1 into R2". A control condition is written before a colon: P: R2 ← R1 happens only when P = 1. A micro-operation is an elementary operation on data stored in registers, completed in one clock pulse.
- Register transfer: R2 ← R1
- Arithmetic: R3 ← R1 + R2, R1 ← R1 + 1 (increment), R2 ← R2' + 1 (2's complement)
- Logic: R1 ← R1 ∧ R2 (AND), R1 ← R1 ⊕ R2 (XOR)
- Shift: shl R1 (shift left), shr R1, circular shift and arithmetic shift
Topic 5
Instruction formats
An instruction tells the CPU what to do. It has an opcode (operation) and an address/operand part. In the basic computer, a 16-bit instruction has a 1-bit mode (I), a 3-bit opcode and a 12-bit address.
| Type | How it is identified | Example |
|---|---|---|
| Memory-reference | Opcode 000 to 110; uses a memory address (I = 0 direct, I = 1 indirect) | AND, ADD, LDA, STA, BUN |
| Register-reference | Opcode 111 and I = 0; operates on the accumulator | CLA, CMA, INC, HLT |
| Input/output | Opcode 111 and I = 1; communicates with I/O | INP, OUT, ION, IOF |
Topic 6
Common bus system
Connecting every register to every other register with separate wires would need too many wires. Instead, a common bus — a set of shared lines — carries data between registers and memory, and select lines choose which register puts data on the bus at a time.
- Data bus: carries the actual data; bidirectional.
- Address bus: carries the memory address; unidirectional (CPU to memory). A 16-bit address bus can address 2¹⁶ = 64K locations.
- Control bus: carries control signals such as read, write, clock and interrupt.
Key terms
- Stored program concept
- Instructions and data are stored together in memory
- Von Neumann bottleneck
- The speed limit caused by a single shared bus for instructions and data
- Micro-operation
- An elementary operation on register data in one clock pulse
- Opcode
- The part of an instruction that specifies the operation
- Common bus
- Shared lines used to transfer data between registers and memory
Quick revision
- CPU = ALU + Control Unit + registers.
- Von Neumann: one memory and bus; Harvard: separate memories and buses.
- RISC: few simple instructions, one cycle each; CISC: many complex instructions.
- RTL: R2 ← R1; micro-operations are transfer, arithmetic, logic and shift.
- Buses: data (two-way), address (one-way), control.
Important exam questions
Practice questions written to the PTU exam pattern for this unit's syllabus: short answers (Section A style) and long answers (Sections B and C style).
Short-answer questions
- Q1.What is the stored program concept?
- Q2.Differentiate between Von Neumann and Harvard architecture.
- Q3.Expand RISC and CISC.
- Q4.What is a micro-operation? Give two examples.
- Q5.Name the three types of buses.
- Q6.What is an opcode?
Long-answer questions
- Q1.Explain the organisation of a CPU and the role of its main registers.
- Q2.Compare RISC and CISC architectures in detail.
- Q3.Explain register transfer and the types of micro-operations with examples.
- Q4.Explain the common bus system of a basic computer and the three instruction formats.
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