Computer System Architecture Notes
Subject Overview
Computer System Architecture covers computer organization fundamentals (Von Neumann architecture, Flynn's classification), basic computer instructions and control unit design, I/
Subject at a glance
4
Units
32
Topics
4
Credits
4
Infographics
Unit-wise Syllabus
4 units — open any unit for detailed topic-wise notes, diagrams and important exam questions
- Computer organization/design/architecture
- stored program concept
- Von Neumann architecture
- Flynn's classification (SISD/SIMD/MIMD)
- register transfer language
- micro-operations (logic, shift, arithmetic)
- common bus system and data movement
SISD
Single instruction, single data: classic uniprocessor
SIMD
Single instruction, multiple data: GPUs, vector processors
MISD
Multiple instruction, single data: rare
MIMD
Multiple instruction, multiple data: multicore systems
Study guide
This unit introduces organisation, design and architecture, the stored-program concept, the Von Neumann architecture, Flynn's classification (SISD, SIMD, MIMD), register transfer language, micro-operations (logic, shift, arithmetic) and the common bus system. Learn Flynn's four categories with an example for each.
- Instruction types (memory/I/O/register reference)
- instruction cycle
- instruction formats
- interrupt and interrupt cycle
- hardwired and micro-programmed control units
- addressing modes
- 1. Fetch: Get instruction from memory
- 2. Decode: Work out what it means
- 3. Fetch operands: Get the data needed
- 4. Execute: Carry out the operation
- 5. Check interrupts: Handle if pending
Study guide
You study instruction types, the instruction cycle, instruction formats, interrupts, hardwired and micro-programmed control units and addressing modes. Memorise the addressing modes with a small example of each.
- I/O interface unit
- port types
- I/O bus
- isolated vs memory-mapped I/O
- programmed I/O
- interrupt-initiated I/O
- DMA controller and IOP
- synchronous and asynchronous data transfer
- strobe and handshaking
Programmed I/O
CPU keeps checking the device
High: busy waiting
Interrupt-driven I/O
Device signals when ready
Medium
DMA
Controller moves data directly to memory
Low: CPU only sets it up
Study guide
You study the I/O interface, ports, the I/O bus, isolated versus memory-mapped I/O, programmed and interrupt-driven I/O, DMA and IOP and synchronous and asynchronous transfer with strobe and handshaking. Compare programmed I/O, interrupt-driven I/O and DMA.
- Memory and register stack
- memory hierarchy
- RAM/ROM chips
- logical/physical addresses
- associative memory
- cache memory initialization/writing/locality of reference/hit ratio
- replacement algorithms (LRU, FIFO)
- direct/associative/set-associative mapping
- Harvard architecture
- mobile device architectures
Direct
Exactly one possible line
Simple but more conflicts
Associative
Any line
Flexible but costly to search
Set-associative
Any line within one set
Balance of both
Study guide
You study stack organisation, memory hierarchy, RAM and ROM chips, logical and physical addresses, associative memory, cache memory (locality of reference, hit ratio, replacement algorithms, mapping), the Harvard architecture and mobile device architectures. Practise a cache mapping and hit ratio problem.
Why Computer System Architecture Matters
Computer architecture explains how hardware executes your code, which helps you write faster programs, understand performance and prepare for technical interviews and competitive exams.
How to Prepare for Computer System Architecture
- Learn the instruction cycle and the three cache mapping techniques with diagrams.
- Prepare a comparison of Von Neumann and Harvard architecture.
- Practise hit ratio and effective access time numericals.
Computer System Architecture: Frequently Asked Questions
What is cache memory?
Cache is a small, fast memory between the CPU and main memory that stores frequently used data to reduce access time.
What is DMA?
Direct memory access lets an I/O device transfer data to or from memory without constant CPU involvement.
