Unit 3 of 4 · B.Sc IT Sem 3

Unit 3: I/O organization

Computer System Architecture notes · PTU syllabus (BSIT301/BSBC204)

3 min read5 topics10 exam questions
On this page
  1. Unit summary
  2. The I/O interface unit
  3. The I/O bus
  4. Isolated vs memory-mapped I/O
  5. Modes of data transfer
  6. Synchronous and asynchronous data transfer
  7. Key terms
  8. Quick revision
  9. Important questions

Unit summary

Input/output organisation connects the CPU and memory with the outside world. This unit covers the I/O interface unit, port types, the I/O bus, isolated vs memory-mapped I/O, programmed I/O, interrupt-initiated I/O, the DMA controller and I/O processors, synchronous and asynchronous data transfer, and strobe and handshaking.

After this unit you can

  • Explain the I/O interface, ports and I/O bus
  • Compare isolated and memory-mapped I/O
  • Compare programmed, interrupt-initiated and DMA transfer
  • Explain synchronous and asynchronous transfer, strobe and handshaking

PTU syllabus topics

  • I/O interface unit
  • port types
  • I/O bus
  • isolated vs memory-mapped I/O
  • programmed I/O
  • interrupt-initiated I/O
  • DMA controller and IOP
  • synchronous and asynchronous data transfer
  • strobe and handshaking
ComparisonModes of data transfer
How it works
CPU involvement

Programmed I/O

CPU keeps checking the device

High: busy waiting

Interrupt-driven I/O

Device signals when ready

Medium

DMA

Controller moves data directly to memory

Low: CPU only sets it up

1

Topic 1

The I/O interface unit

  • Need: peripherals differ in speed, data formats and signals from the CPU; an interface resolves these differences.
  • Functions: decode device addresses, buffer data, convert formats, provide status and control signals, handle interrupts.
  • Ports: data port (data in and out), status port (device status), control port (commands); serial and parallel ports.
2

Topic 2

The I/O bus

  • I/O bus: data lines, address lines and control lines connecting the processor to interfaces; each interface checks the address to respond.
  • I/O commands: control, status, data output, data input.
3

Topic 3

Isolated vs memory-mapped I/O

ComparisonI/O addressing
Isolated I/O
Memory-mapped I/O

Address space

Separate for I/O and memory

Shared — I/O registers have memory addresses

Instructions

Special IN and OUT instructions

Ordinary memory instructions

Memory available

Full memory space

Reduced by I/O addresses

Example

Intel x86 port I/O

ARM processors, most modern systems

4

Topic 4

Modes of data transfer

ComparisonData transfer modes
How it works
Drawback

Programmed I/O

CPU repeatedly checks device status (polling)

Wastes CPU time

Interrupt-initiated I/O

Device interrupts CPU when ready

Overhead for each transfer

Direct memory access (DMA)

DMA controller transfers blocks directly between memory and device; CPU only starts and ends

Needs extra hardware; bus contention

  • DMA operation: CPU programs the DMA controller (address, count, direction); controller requests the bus (bus request), CPU grants it (bus grant); transfer in burst or cycle-stealing mode; interrupt at completion.
  • I/O processor (IOP): a processor dedicated to I/O tasks, executing its own I/O programs — relieves the CPU further.
5

Topic 5

Synchronous and asynchronous data transfer

  • Synchronous: sender and receiver share a common clock.
  • Asynchronous: units have separate clocks; timing signals coordinate transfer.
ComparisonStrobe vs handshaking
Strobe control
Handshaking

Signals

One control line (strobe) from source or destination

Two lines — data valid and data accepted

Confirmation

No acknowledgement

Each step acknowledged

Reliability

Lower

Higher

  • Asynchronous serial transfer: start bit, data bits, parity bit, stop bits — used in UART communication.

Key terms

I/O interface
Hardware linking CPU and a peripheral
Memory-mapped I/O
I/O registers accessed as memory locations
Polling
CPU repeatedly checking device status
DMA
Direct memory access without CPU involvement in each transfer
Handshaking
Two-way control signalling for data transfer

Quick revision

  • Interface functions; data, status, control ports; I/O bus.
  • Isolated vs memory-mapped I/O.
  • Programmed, interrupt-driven, DMA; burst and cycle stealing; IOP.
  • Synchronous vs asynchronous; strobe vs handshaking; serial frame.

Important exam questions

Practice questions written to the PTU exam pattern for this unit's syllabus: short answers (Section A style) and long answers (Sections B and C style).

Short-answer questions

  1. Q1.Why is an I/O interface needed?
  2. Q2.Distinguish isolated and memory-mapped I/O.
  3. Q3.What is polling?
  4. Q4.What is cycle stealing in DMA?
  5. Q5.What is an IOP?
  6. Q6.Distinguish strobe and handshaking.

Long-answer questions

  1. Q1.Explain the I/O interface, ports and I/O bus.
  2. Q2.Compare isolated and memory-mapped I/O.
  3. Q3.Explain programmed I/O, interrupt-initiated I/O and DMA.
  4. Q4.Explain asynchronous data transfer using strobe and handshaking.

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