Unit 1: Computer organization fundamentals
Computer System Architecture notes · PTU syllabus (BSIT301/BSBC204)
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Unit summary
Computer architecture explains how hardware is organised to execute programs. This unit covers computer organisation, design and architecture, the stored program concept, Von Neumann architecture, Flynn's classification — SISD, SIMD and MIMD — register transfer language, logic, shift and arithmetic micro-operations, and the common bus system and data movement.
After this unit you can
- Distinguish computer organisation, design and architecture
- Explain the stored program concept and Von Neumann architecture
- Classify computers by Flynn's taxonomy
- Write register transfers and micro-operations and explain the common bus
PTU syllabus topics
- Computer organization/design/architecture
- stored program concept
- Von Neumann architecture
- Flynn's classification (SISD/SIMD/MIMD)
- register transfer language
- micro-operations (logic, shift, arithmetic)
- common bus system and data movement
SISD
Single instruction, single data: classic uniprocessor
SIMD
Single instruction, multiple data: GPUs, vector processors
MISD
Multiple instruction, single data: rare
MIMD
Multiple instruction, multiple data: multicore systems
Topic 1
Computer organisation, design and architecture
- Computer architecture: attributes visible to the programmer — instruction set, data types, addressing modes, I/O mechanisms (what the computer does).
- Computer organisation: how features are implemented — control signals, interfaces, memory technology (how it does it).
- Computer design: determining the hardware components and their interconnection to meet specifications.
Topic 2
Functional units of a computer
A computer has four functional parts: the input unit, the memory unit, the CPU and the output unit. The CPU has three main parts:
- Arithmetic Logic Unit (ALU): performs arithmetic and logical operations.
- Control Unit (CU): fetches and decodes instructions and sends control signals to every part.
- Registers: small, very fast storage inside the CPU, such as the Program Counter (PC), Accumulator (AC), Instruction Register (IR), Memory Address Register (MAR) and Memory Data Register (MDR).
- 1Fetch
PC gives the address; instruction goes to IR
- 2Decode
CU works out the operation
- 3Execute
ALU or memory carries it out
- 4Store and repeat
PC moves to the next instruction
Topic 3
Stored program concept and Von Neumann architecture
The stored program concept (John von Neumann, 1945) says that both the program instructions and the data are stored together in main memory, so a computer can be reprogrammed simply by loading a new program.
Memory
One memory for instructions and data
Separate memories for instructions and data
Buses
One shared bus
Separate buses
Speed
Slower: instruction and data fetches take turns (Von Neumann bottleneck)
Faster: both can be fetched at once
Used in
General-purpose PCs
Microcontrollers, DSPs, CPU caches
Topic 4
Flynn's classification
SISD
Single instruction, single data — traditional uniprocessor
SIMD
Single instruction, multiple data — vector processors, GPUs
MISD
Multiple instruction, single data — rare (fault-tolerant systems)
MIMD
Multiple instruction, multiple data — multicore processors, clusters
Topic 5
Register transfer language and micro-operations
Register Transfer Language (RTL) is a notation for describing data moving between registers. R2 ← R1 means "copy the contents of R1 into R2". A control condition is written before a colon: P: R2 ← R1 happens only when P = 1. A micro-operation is an elementary operation on data stored in registers, completed in one clock pulse.
- Register transfer: R2 ← R1
- Arithmetic: R3 ← R1 + R2, R1 ← R1 + 1 (increment), R2 ← R2' + 1 (2's complement)
- Logic: R1 ← R1 ∧ R2 (AND), R1 ← R1 ⊕ R2 (XOR)
- Shift: shl R1 (shift left), shr R1, circular shift and arithmetic shift
Register transfer
R2 ← R1
Arithmetic
Add, subtract, increment, decrement, 2's complement
Logic
AND, OR, XOR, complement — selective set, clear, mask
Shift
Logical, circular (rotate), arithmetic shifts
Topic 6
Common bus system and data movement
Connecting every register to every other register with separate wires would need too many wires. Instead, a common bus — a set of shared lines — carries data between registers and memory, and select lines choose which register puts data on the bus at a time.
- Data bus: carries the actual data; bidirectional.
- Address bus: carries the memory address; unidirectional (CPU to memory). A 16-bit address bus can address 2¹⁶ = 64K locations.
- Control bus: carries control signals such as read, write, clock and interrupt.
Key terms
- Computer architecture
- Programmer-visible attributes of a computer
- Stored program concept
- Instructions and data stored together in memory
- SIMD
- One instruction operating on multiple data items
- Micro-operation
- Elementary operation completed in one clock pulse
- Common bus
- Shared set of lines for data transfer
Quick revision
- Architecture vs organisation vs design.
- Input, memory, CPU (ALU, CU, registers), output.
- Stored program; Von Neumann (and bottleneck).
- SISD, SIMD, MISD, MIMD.
- RTL notation; arithmetic, logic, shift micro-operations; common bus.
Important exam questions
Practice questions written to the PTU exam pattern for this unit's syllabus: short answers (Section A style) and long answers (Sections B and C style).
Short-answer questions
- Q1.Distinguish computer architecture and organisation.
- Q2.State the stored program concept.
- Q3.What is the Von Neumann bottleneck?
- Q4.Give an example of SIMD.
- Q5.Write the RTL for transferring R1 to R2 when P = 1.
- Q6.Name three types of shift micro-operations.
Long-answer questions
- Q1.Explain the stored program concept and Von Neumann architecture.
- Q2.Explain Flynn's classification of computers.
- Q3.Explain register transfer language and micro-operations.
- Q4.Explain the common bus system with a diagram.
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