Unit 2 of 4 · B.Sc IT Sem 3

Unit 2: Instructions and control unit

Computer System Architecture notes · PTU syllabus (BSIT301/BSBC204)

3 min read5 topics10 exam questions
On this page
  1. Unit summary
  2. Instruction types and formats
  3. The instruction cycle
  4. Interrupts and the interrupt cycle
  5. Hardwired and micro-programmed control units
  6. Addressing modes
  7. Key terms
  8. Quick revision
  9. Important questions

Unit summary

Instructions tell the CPU what to do, and the control unit makes it happen. This unit covers instruction types — memory-, I/O- and register-reference — the instruction cycle, instruction formats, interrupts and the interrupt cycle, hardwired and micro-programmed control units, and addressing modes.

After this unit you can

  • Classify instructions and explain instruction formats
  • Explain the instruction and interrupt cycles
  • Compare hardwired and micro-programmed control
  • Explain addressing modes

PTU syllabus topics

  • Instruction types (memory/I/O/register reference)
  • instruction cycle
  • instruction formats
  • interrupt and interrupt cycle
  • hardwired and micro-programmed control units
  • addressing modes
CycleThe instruction cycle
The instruction cycle
1Fetch
2Decode
3Fetch operands
4Execute
5Check interrupts
  1. 1. Fetch: Get instruction from memory
  2. 2. Decode: Work out what it means
  3. 3. Fetch operands: Get the data needed
  4. 4. Execute: Carry out the operation
  5. 5. Check interrupts: Handle if pending
1

Topic 1

Instruction types and formats

An instruction tells the CPU what to do. It has an opcode (operation) and an address/operand part. In the basic computer, a 16-bit instruction has a 1-bit mode (I), a 3-bit opcode and a 12-bit address.

TypeHow it is identifiedExample
Memory-referenceOpcode 000 to 110; uses a memory address (I = 0 direct, I = 1 indirect)AND, ADD, LDA, STA, BUN
Register-referenceOpcode 111 and I = 0; operates on the accumulatorCLA, CMA, INC, HLT
Input/outputOpcode 111 and I = 1; communicates with I/OINP, OUT, ION, IOF
ClassificationInstruction formats by address fields
Formats
  • Three-address

    ADD R1, A, B

  • Two-address

    ADD R1, A

  • One-address (accumulator)

    ADD A

  • Zero-address (stack)

    ADD — operands on the stack

2

Topic 2

The instruction cycle

CycleInstruction cycle
Instruction cycle
1Fetch
2Decode
3Fetch operand
4Execute
5Check interrupts
  1. 1. Fetch: PC → AR; memory → IR; PC + 1
  2. 2. Decode: Decode opcode, read mode bit I
  3. 3. Fetch operand: Read effective address if indirect
  4. 4. Execute: Carry out the operation
  5. 5. Check interrupts: Go to interrupt cycle if needed
3

Topic 3

Interrupts and the interrupt cycle

  • Interrupt: a signal that suspends the current program to service an event (I/O completion, error, timer).
  • Types: external (I/O devices), internal (traps — overflow, divide by zero), software interrupts (system calls).
ProcessInterrupt cycle
  1. 1Save the return address (PC)
  2. 2Branch to the interrupt service routine
  3. 3Disable further interrupts
  4. 4Service the interrupt
  5. 5Restore and return to the program
4

Topic 4

Hardwired and micro-programmed control units

ComparisonControl unit design
Hardwired control
Micro-programmed control

Implementation

Logic gates, decoders, flip-flops

Control memory storing microinstructions

Speed

Faster

Slower

Flexibility

Hard to modify

Easy to change by rewriting microcode

Used in

RISC processors

CISC processors

Design

Complex for large instruction sets

Systematic

5

Topic 5

Addressing modes

ModeEffective addressExample
ImmediateOperand is in the instructionADD #5
RegisterOperand is in a registerADD R1
DirectAddress field gives the operand's addressLDA 500
IndirectAddress field gives the address of the addressLDA (500)
Register indirectRegister holds the operand's addressLDA (R1)
IndexedAddress + index registerLDA 500(X)
RelativePC + offsetBR +10
Auto-increment and auto-decrementRegister indirect with register updatedLDA (R1)+
  • Purpose: flexibility for pointers, arrays, loops and relocation; reduce instruction size.

Key terms

Opcode
Part of an instruction specifying the operation
Instruction cycle
Fetch, decode, execute sequence
Interrupt
Signal that suspends the current program
Microinstruction
Control word stored in control memory
Effective address
Actual address of the operand

Quick revision

  • Memory-, register-, I/O-reference instructions; three-, two-, one-, zero-address formats.
  • Fetch, decode, operand fetch, execute.
  • Interrupt types and cycle.
  • Hardwired vs micro-programmed control.
  • Immediate, register, direct, indirect, indexed, relative addressing.

Important exam questions

Practice questions written to the PTU exam pattern for this unit's syllabus: short answers (Section A style) and long answers (Sections B and C style).

Short-answer questions

  1. Q1.Name the three types of instructions in the basic computer.
  2. Q2.What is a zero-address instruction?
  3. Q3.State the steps of the instruction cycle.
  4. Q4.What happens in the interrupt cycle?
  5. Q5.Distinguish hardwired and micro-programmed control.
  6. Q6.Distinguish direct and indirect addressing.

Long-answer questions

  1. Q1.Explain instruction types and formats.
  2. Q2.Explain the instruction cycle and interrupt cycle.
  3. Q3.Compare hardwired and micro-programmed control units.
  4. Q4.Explain addressing modes with examples.

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